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Johnson, Anju P, Junxiu, Liu, Millard, Alan G, Shvan, Karim, Tyrrel, Andy M, Harkin, Jim, Timmis, Jonathan, McDaid, Liam J and Halliday, David M (2017) Homeostatic Fault Tolerance in Spiking Neural Networks: A Dynamic Hardware Perspective. IEEE Transactions on Circuits and Systems, 65 (2). pp. 687-689. ISSN 1549-8328

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Abstract

Abstract

Fault tolerance is a remarkable feature of biological systems and their self-repair capability influence modern electronic systems. In this paper, we propose a novel plastic neural network model, which establishes homeostasis in a spiking neural network. Combined with this plasticity and the inspiration from inhibitory interneurons, we develop a fault-resilient robotic controller implemented on an FPGA establishing obstacle avoidance task. We demonstrate the proposed methodology on a spiking neural network implemented on Xilinx Artix-7 FPGA. The system is able to maintain stable firing (tolerance ±10%) with a loss of up to 75% of the original synaptic inputs to a neuron. Our repair mechanism has minimal hardware overhead with a tuning circuit (repair unit) which consumes only three slices/neuron for implementing a threshold voltage-based homeostatic fault-tolerant unit. The overall architecture has a minimal impact on power consumption and, therefore, supports scalable implementations. This paper opens a novel way of implementing the behavior of natural fault tolerant system in hardware establishing homeostatic self-repair behavior.

Item Type: Article
Depositing User: Klaire Purvis-Shepherd
URI: https://sure.sunderland.ac.uk/id/eprint/10849

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Item ID
10849
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ISSN
1549-8328

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Date Deposited
07 Jun 2019 13:55
Last Modified
23 May 2025 10:07

Contributors

Author
Anju P Johnson
Author
Liu Junxiu
Author
Alan G Millard
Author
Karim Shvan
Author
Andy M Tyrrel
Author
Jim Harkin
Author
Jonathan Timmis
Author
Liam J McDaid
Author
David M Halliday

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