A new coarse-grained FPGA architecture exploration environment

Parvez, Husain, Marrakchi, Zied, Farooq, Umer and Mehrez, Habib (2009) A new coarse-grained FPGA architecture exploration environment. In: 2008 International Conference on Field-Programmable Technology, 08-10 Dec 2008, Taipei, Taiwan.

More Information

Uncontrolled Keywords: Field programmable gate arrays Computer architecture Routing Pins Cost function Digital signal processing Testing Logic Application software Context modeling

Related URLs: Publisher

Depositing User: Umer Farooq

Identifiers

Item ID: 16354

URI: http://sure.sunderland.ac.uk/id/eprint/16354

Official URL: https://ieeexplore.ieee.org/abstract/document/4762...

Users with ORCIDS

ORCID for Umer Farooq: orcid.org/0000-0002-5220-4908

Catalogue record

Date Deposited: 14 Aug 2023 15:30

Last Modified: 14 Aug 2023 15:30

Contributors

Author:	Umer Farooq
Author:	Husain Parvez
Author:	Zied Marrakchi
Author:	Habib Mehrez

University Divisions

Faculty of Technology

Subjects

Engineering > Electrical Engineering
Engineering

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