Using timing-driven inter-FPGA routing for multi-FPGA prototyping exploration

Farooq, Umer, Chotin-Avot, Roselyne, Azeem, Moazam, Cherif, Zouha, Ravoson, Maminionja, Khan, Saqib and Mehrez, Habib (2016) Using timing-driven inter-FPGA routing for multi-FPGA prototyping exploration. In: 2016 Euromicro Conference on Digital System Design (DSD), 31 Aug-02 Sep 2016, St. Raphael Hotel, Limassol, Cyprus.

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Related URLs: Publisher

Depositing User: Umer Farooq

Identifiers

Item ID: 16375

URI: http://sure.sunderland.ac.uk/id/eprint/16375

Official URL: http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD20...

Users with ORCIDS

ORCID for Umer Farooq: orcid.org/0000-0002-5220-4908

Catalogue record

Date Deposited: 23 Aug 2023 09:22

Last Modified: 23 Aug 2023 09:22

Contributors

Author:	Umer Farooq
Author:	Roselyne Chotin-Avot
Author:	Moazam Azeem
Author:	Zouha Cherif
Author:	Maminionja Ravoson
Author:	Saqib Khan
Author:	Habib Mehrez

University Divisions

Faculty of Technology > School of Engineering

Subjects

Engineering > Electrical Engineering

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