Using timing-driven inter-FPGA routing for multi-FPGA prototyping exploration
Farooq, Umer, Chotin-Avot, Roselyne, Azeem, Moazam, Cherif, Zouha, Ravoson, Maminionja, Khan, Saqib and Mehrez, Habib (2016) Using timing-driven inter-FPGA routing for multi-FPGA prototyping exploration. In: 2016 Euromicro Conference on Digital System Design (DSD), 31 Aug-02 Sep 2016, St. Raphael Hotel, Limassol, Cyprus.
| Item Type: | Conference or Workshop Item (Paper) |
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| Related URLs: |
| Depositing User: Umer Farooq |
Identifiers
| Item ID: 16375 |
| URI: http://sure.sunderland.ac.uk/id/eprint/16375 | Official URL: http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD20... |
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| Date Deposited: 23 Aug 2023 09:22 |
| Last Modified: 23 Aug 2023 09:22 |
| Author: |
Umer Farooq
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| Author: | Roselyne Chotin-Avot |
| Author: | Moazam Azeem |
| Author: | Zouha Cherif |
| Author: | Maminionja Ravoson |
| Author: | Saqib Khan |
| Author: | Habib Mehrez |
University Divisions
Faculty of Technology > School of EngineeringSubjects
Engineering > Electrical EngineeringActions (login required)
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